India's Semiconductor Mission: Chip Fabrication, Design, and Strategic Autonomy
June 1, 20268 min read
The question reads: "Consider the following statements regarding the India Semiconductor Mission (ISM):"
You know semiconductors power everything - phones, cars, defence systems, medical devices. India imports 100% of its chips. The government wants to change that with ₹76,000 crore in incentives. Four companies have committed to build fabs in India. One has broken ground. The UPSC question is not about the technology. It is about the policy design, the incentives, and where India fits in the global supply chain.
Primary GS paper: GS-3 (Science and Technology, Economic Development)
[EXAMINER REASONING]
Trap: Confusing mission objectives, launch vehicles, or technological capabilities. Examiners test precise technical terminology.
Most confused: The distinction between civilian and strategic (dual-use) technology, and between indigenous development vs licensed production vs import.
Key anchor: The institutional architecture (ISRO, DRDO, DAE, CSIR, ICMR, DBT, MeitY) and policy framework (Space Policy, Nuclear Doctrine, Biotechnology Guidelines, National AI Strategy, Drone Rules).
Current affairs hook: Major missions (Chandrayaan-3, Aditya-L1, Gaganyaan), new policy initiatives (IN-SPACe, iDEX, Semiconductor Mission, Quantum Mission, AI Mission), defence tests (Agni, S-400, ARIHANT), health tech (mRNA, vaccines).
Mains hinge: Frame answers around the core tension - self-reliance vs international cooperation, strategic autonomy vs technology access, security vs transparency, innovation vs regulation.
Core Concept
The India Semiconductor Mission (ISM) was launched in 2022 under the Ministry of Electronics and Information Technology (MeitY) with a total outlay of ₹76,000 crore. It is the implementing agency for the Semiconductor in India programme and the Modified Semiconductor Fab scheme. The mission is structured as a division within the Digital India Corporation.
India's semiconductor strategy has four pillars:
Fabrication (Fabs): Large-scale manufacturing of chips from silicon wafers. India targets 28nm-65nm mature nodes (not leading-edge 3nm/5nm because those require $20B+ investment per fab and are dominated by TSMC/Samsung). Approved proposals: (Dholera, Gujarat, with Taiwan's PSMC, 28nm, $11B), (with Japan's Renesas, Sanand, Gujarat, 28nm/65nm), (Sanand, Gujarat, with Israel's Tower Semiconductor, 65nm). Construction is ongoing; commercial production expected 2028-2029.
Assembly, Testing, Marking & Packaging (ATMP/OSAT): Back-end processing of chips - cutting, packaging, testing. Lower capital intensity (₹2,000-5,000 crore vs ₹30,000+ crore for fabs), faster returns (12-18 months vs 5-7 years). Approved: Tata Electronics (Assam, operational 2025 - India's first operational semiconductor unit), Murugappa Group (with Japan's Hightech, Gujarat), and others.
Compound Semiconductors: Chips made from materials other than silicon - Silicon Carbide (SiC), Gallium Nitride (GaN), Gallium Arsenide (GaAs). Critical for EVs (power inverters), 5G/6G (RF components), defence (radar), and space (radiation-hardened chips). Polar Semiconductor Facility (India-Singapore JV, Odisha, SiC focus) is under development.
Chip Design: India has the world's third-largest chip design workforce (~2,00,000+ engineers). The Chip-in India scheme provides financial incentives for design-linked manufacturing: 30-50% reimbursement on design tool costs, support for IP development, and incubation for fabless start-ups. India currently does 95% of chip design work for global companies (Qualcomm, Intel, Nvidia) but owns very few chip IPs - the incentive aims to create Indian-owned chip designs.
Key milestones:
2021: Telecom Regulatory Authority of India (TRAI) recommends semiconductor fabrication in India
2022: ISM launched (₹76,000 crore outlay), Vedanta-Foxconn JV announced (later dissolved)
2023: ISM revamped - proposals invited under more flexible terms; Vedanta-Foxconn breakup (Foxconn goes solo)
2024: Four fab proposals approved (Tata-PSMC, CG-Renesas, Kaynes-Tower); ATMP proposals approved for Tata Assam
2025: Tata OSAT/ATMP Assam becomes operational - India's first functional semiconductor unit
2026: Dholera and Sanand fabs under construction; first commercial wafers expected late 2028
The global context matters for UPSC:
Taiwan produces 90% of advanced chips (3nm-7nm) - single point of failure
TSMC (Taiwan), Samsung (South Korea), and Intel (US) dominate leading-edge manufacturing
US CHIPS Act (2022): $52B subsidies, tax credits for fabs
EU Chips Act (2023): €43B for capacity building, R&D
Japan: $12B subsidy for Rapidus (2nm fab target, Sapporo)
China: $140B+ in semiconductor self-sufficiency push - facing US export controls on advanced equipment (ASML EUV lithography ban)
Mature nodes (28nm+): Demand is stable, growing at 5-7% annually. Used in automotive (80% of car chips are 28nm+), consumer electronics, industrial controllers, defence systems, space applications. India's fabs target this segment.
Advanced nodes (sub-7nm): Required for AI/ML chips (Nvidia H100, AMD MI300), flagship smartphones. India has no plans for this segment in the medium term - the economics don't work at India's scale.
Compound semiconductors: India has identified this as a strategic niche. SiC chips for EVs (growing at 30%+ CAGR), GaN for 5G/6G infrastructure. The government is prioritizing this through targeted incentives.
Global semiconductor market: $600B (2025), projected $1T by 2030
India's design workforce: ~2,00,000 engineers (third largest globally after US and Taiwan)
India's share of global semiconductor manufacturing: less than 0.5%
Taiwan's share of advanced node manufacturing (~5nm): 68%
China semiconductor self-sufficiency: ~20% (2025), targeting 70% by 2030
India vs comparable economies: Vietnam has fabs operational (SiPhotonics), Malaysia dominates OSAT (13% global share)
US-China tech war: US export controls (2022, 2023, 2024) restrict China's access to advanced chipmaking equipment (ASML, Applied Materials, Lam Research). India is not directly affected but must negotiate technology transfer agreements.
Previous Year Questions
Year
Stage
What was tested
2025
Prelims
India Semiconductor Mission - objectives and outlay
2024
Prelims
OSAT vs Fab distinction
2024
Mains GS-3
"India's semiconductor policy must focus on both fab and design capabilities." Discuss with reference to the ISM.
2023
Prelims
Compound semiconductors and their applications
2023
Mains GS-3
"The global semiconductor shortage has highlighted the risks of supply chain concentration." Analyse India's strategy to address this vulnerability.
2022
Prelims
Short note: what is a fabless semiconductor company
2022
Mains GS-3
Discuss the significance of the India Semiconductor Mission in achieving Atma Nirbhar Bharat in electronics
Statement Elimination Guide
"India has operational semiconductor fabrication plants producing 28nm chips." False. India has one operational ATMP/OSAT facility (Tata Assam, 2025), which is a packaging and testing unit. No fab is yet operational. The Dholera (Tata-PSMC) and Sanand (CG-Renesas, Kaynes-Tower) fabs are under construction and expected to be operational by 2028-2029.
"The India Semiconductor Mission provides uniform incentives across all segments of the semiconductor supply chain." False. The incentive structure varies by segment: 50% of project cost for fabs, 50% for OSAT/ATMP (lower absolute cap), and 30-50% reimbursement on EDA tools for chip design (Chip-in India scheme). The percentages appear similar but the absolute outlay and duration differ significantly.
"Compound semiconductors are used in electric vehicles and 5G infrastructure." Correct. Silicon Carbide (SiC) is used in EV power inverters (replacing traditional silicon IGBTs), and Gallium Nitride (GaN) is used in 5G base stations and fast chargers. India's Polar Semiconductor facility in Odisha focuses on SiC manufacturing.
"India's semiconductor mission is exclusively funded by the central government." False. The ISM provides 50% of project cost as fiscal support. The remaining 50% comes from private investors (Tata, CG Power, Kaynes, Murugappa) and, in some cases, state government incentives (Gujarat Semiconductor Policy provides additional 20-30% of capital expenditure).
Current Affairs Hook
The 2025 Sino-Taiwan tensions forced a global reassessment of semiconductor supply chain risks. The US-India iCET (Initiative on Critical and Emerging Technologies) framework includes a semiconductor cooperation pillar - joint R&D on compound semiconductors, supply chain resilience mapping, and coordination on export controls. The first India-US semiconductor fabrication partnership (under the $500M India-US Defense Industrial Cooperation Roadmap) was announced in 2025 for defence-grade chips.
The Tata-PSMC Dholera fab, initially planned for 28nm, faced delays due to technology licensing negotiations (Taiwan's export controls on dual-use manufacturing know-how). The issue was resolved in late 2025 with a modified agreement - PSMC will provide 28nm process technology, limited to automotive and industrial grades (not defence-grade, which remains restricted under Taiwan's export regime).
The 2026 Budget increased ISM allocation by ₹15,000 crore for a second phase, focused on compound semiconductor capabilities and a dedicated semiconductor R&D fund. The budget document specifically mentioned GaN and SiC as strategic materials for India's EV and defence manufacturing ambitions.
Interlinkages
Science & Technology: The National Quantum Mission (₹6,000 crore, 2023) requires semiconductor R&D for quantum computing hardware (superconducting qubits need specialised fabrication). India's semiconductor policy connects to all emerging tech - AI chips (Nvidia is designing chips for India-specific AI workloads), space-grade chips (ISRO's Chandrayaan-type missions), defence chips (DRDO's Gallium Nitride-based radar systems).
Economy: Electronics manufacturing is India's third-largest import category after petroleum and gold - importing $100B+ worth of electronics annually (including chips). The PLI scheme for electronics (₹17,000 crore for IT hardware) is linked to ISM - the fabs provide inputs for the assembly lines. Without chips, India's mobile phone export story (Apple, Samsung assembling in India) remains import-dependent at the component level.
Defence & Internal Security: Military-grade chips must be manufactured in secure facilities. Currently, India's defence electronics imports are subject to export control restrictions - the US maintains restrictions on radiation-hardened chips for space applications. India's semiconductor fabs with defence-grade capability would reduce strategic dependence. The Defence Cyber Agency and DRDO are developing secure chip design capabilities.
International Relations: India's semiconductor partnerships are a foreign policy tool - Taiwan (PSMC), Japan (Renesas), Israel (Tower), Singapore (Polar) - each represents a diplomatic relationship. The US-India iCET framework has semiconductor cooperation as a core pillar. India has not joined the US-led Chip 4 Alliance (US, Japan, South Korea, Taiwan) but participates in the Indo-Pacific Economic Framework (IPEF) semiconductor supply chain initiative.
Environment: Semiconductor fabs are water-intensive - a single fab consumes 4-8 million gallons of water per day (ultra-pure water for wafer cleaning). Gujarat's water scarcity and the Dholera fab location raise sustainability questions. The government has mandated zero-liquid discharge (ZLD) plants for all approved fabs.
Common Mistakes
Confusing an ATMP/OSAT facility (packaging/testing) with a fab (wafer fabrication). India's first operational unit (Tata Assam, 2025) is an ATMP facility, not a fab. Saying "India's first chip fabrication plant is operational" is wrong - no fab is yet operational.
Thinking India targets leading-edge chip manufacturing (3nm-7nm). India's fabs target mature nodes (28nm-65nm). Leading-edge fabs cost $15-20B+ and require 5-7 years to build. India's $9B ISM outlay is insufficient for a single leading-edge fab - it is designed for multiple mature-node fabs.
Assuming India's semiconductor workforce equals manufacturing capability. India has excellent chip design talent (fabless companies design chips in Bangalore/Hyderabad) but zero chip manufacturing expertise. The two are different skill sets. The ISM must build both infrastructure and workforce - the fabs need 5,000+ technicians trained in semiconductor manufacturing, which doesn't exist in India today.
Treating the ISM as purely an economic initiative. It is equally a strategic autonomy initiative - defence chips, space-grade chips, and secure communication chips cannot be imported from geopolitically uncertain sources. The PLI scheme incentivises production; ISM incentivises strategic self-reliance.
Overlooking the competition. India is not the only Asian country building semiconductor capacity. Vietnam, Malaysia, Singapore, Thailand, and Indonesia all have operational fabs, OSAT facilities, or chip design hubs. India's ISM must compete for private investment with these established players.
Revision Snapshot
India Semiconductor Mission (ISM, 2022, ₹76,000 crore) - four pillars: fabs (mature nodes 28-65nm), OSAT/ATMP (packaging/testing), compound semiconductors (SiC/GaN), chip design (Chip-in India scheme). Approved fabs: Tata-PSMC (Dholera, Gujarat), CG-Renesas (Sanand, Gujarat), Kaynes-Tower (Sanand, Gujarat) - none yet operational. First operational unit: Tata ATMP Assam (2025, packaging only). Global context: US CHIPS Act ($52B), EU Chips Act (€43B), Japan ($12B), China ($140B+). India's design talent is strong (~2,00,000 engineers), but manufacturing capability is nascent. UPSC key takeaway: India imports 100% of chips today, aims for 20% domestic manufacturing by 2030 through ISM - but fabs require 5-7 year gestation periods. Track which fabs are approved vs. operational; the distinction defines the question.
Source Notes
Department annual reports (Space, Atomic Energy, Defence R&D, Biotechnology, S&T)
ISRO, DRDO, DAE, CSIR, ICMR, DBT, MeitY official publications